A 2048 complex point FFT processor using a novel data scaling approach
نویسندگان
چکیده
In this paper, a novel data scaling method for pipelined FFT processors is proposed. By using data scaling, the' FFT processor can operate on a wide range of input signals without performance loss. Compared to existing block scaling methods, like implementations of Convergent Block Floating Point (CBFP), the memory requirements can be reduced while preserving the SNR. The FFT processor has been synthesized and sent for fabrication in a 0.35pm standard CMOS technology. In netlist simulations, the FFT processor is capable of calculating a 2048 complex point FFT or IFFT in 27ps with a maximum clock frequency of 76MHz.
منابع مشابه
A Pipelined FFT Processor using Data Scaling with Reduced Memory Requirements
In this paper, a scaling method for large pipelined FFT implementations is proposed. Compared to existing block scaling methods, like implementations of Convergent Block Floating Point (CBFP), the memory requirements can be reduced while preserving the SNR. The FFT processor is implemented in a 0.35μm standard CMOS technology and is capable of calculating a 2048 complex point FFT or IFFT in 40μ...
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